TriQuint’s GA1086 operates from 30 MHz to 67 MHz. This TTL-level clock buffer chip supports the tight timing requirements of high-performance microprocessors, with near zero input-to-output delay and very low pin-to-pin skew. The device offers 10 usable outputs synchronized in phase and frequency to a periodic clock input signal. One of the ten outputs is a onehalf clock output (CLK ÷ 2). With split termination, the GA1086 can be used to drive up to nineteen 15 pF loads, as shown in Figure 10.

Features
• Operates from 30 MHz to 67MHz
• Pin-to-pin output skew of 250 ps (max)
• Period-to-period jitter: 75 ps (typ)
• Near-zero propagation delay: –350 ps ± 500 ps or –350 ps ± 1000 ps
• 10 symmetric, TTL-compatible outputs with 30 mA drive and rise and fall times of 1.4 ns(max)
• 28-pin J-lead surface-mount package
• Special test mode
• Meets or exceeds Pentium™ processor timing requirements
• Typical applications include low-skew clock distribution for:
    • RISC- or CISC-based systems
    • Multi-processor systems
    • High-speed backplanes