Description
The EDS2516AP is a 256M bits SDRAM organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II)

Features
• 3.3V power supply
• Clock frequency: 166MHz/133MHz (max.)
• LVTTL interface
• Single pulsed /RAS
• ×16 organization
• 4 banks can operate simultaneously and independently
• Burst read/write operation and burst read/single write operation capability
• Programmable burst length (BL): 1, 2, 4, 8, full page
• 2 variations of burst sequence
   - Sequential (BL = 1, 2, 4, 8, full page)
   - Interleave (BL = 1, 2, 4, 8)
• Programmable /CAS latency (CL): 2, 3
• Byte control by UDQM and LDQM Refresh cycles: 8192 refresh cycles/64ms
• 2 variations of refresh
   - Auto refresh
   - Self refresh
• 2 types of TSOP (II) package
   - Sn-Pb solder
   - Lead free solder (Sn-Bi)