Overview
The Atmel® AVR® XMEGA™ A3 is a family of low power, high performance and peripheral rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the XMEGA A3 achieves throughputs approaching 1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power consumption versus processing speed.

Features
• High-performance, Low-power 8/16-bit Atmel® AVR® XMEGATM Microcontroller
• Non-volatile Program and Data Memories
    – 64 KB - 256 KB of In-System Self-Programmable Flash
    – 4 KB - 8 KB Boot Code Section with Independent Lock Bits
    – 2 KB - 4 KB EEPROM
    – 4 KB - 16 KB Internal SRAM
• Peripheral Features
    – Four-channel DMA Controller with support for external requests
    – Eight-channel Event System
    – Seven 16-bit Timer/Counters
        Four Timer/Counters with 4 Output Compare or Input Capture channels
        Three Timer/Counters with 2 Output Compare or Input Capture channels
        High Resolution Extensions on all Timer/Counters
        Advanced Waveform Extension on one Timer/Counter
    – Seven USARTs
    IrDA Extension on 1 USART
    – AES and DES Crypto Engine
    – Two Two-wire Interfaces with dual address match (I2C and SMBus compatible)
    – Three SPI (Serial Peripheral Interfaces)
    – 16-bit Real Time Counter with Separate Oscillator
    – Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters
    – One Two-channel, 12-bit, 1 Msps Digital to Analog Converter
    – Four Analog Comparators with Window compare function
    – External Interrupts on all General Purpose I/O pins
    – Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
• Special Microcontroller Features
    – Power-on Reset and Programmable Brown-out Detection
    – Internal and External Clock Options with PLL
    – Programmable Multi-level Interrupt Controller
    – Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby
    – Advanced Programming, Test and Debugging Interfaces
        JTAG (IEEE 1149.1 Compliant) Interface for test, debug and programming
        PDI (Program and Debug Interface) for programming, test and debugging
• I/O and Packages
    – 50 Programmable I/O Lines
    – 64-lead TQFP
    – 64-pad QFN
• Operating Voltage
    – 1.6 – 3.6V
• Speed performance
    – 0 – 12 MHz @ 1.6 – 3.6V
    – 0 – 32 MHz @ 2.7 – 3.6V

Typical Applications
• Industrial control
• Climate control
• Hand-held battery applications
• Factory automation
• ZigBee
• Power tools
• Building control
• Motor control
• HVAC
• Board control
• Networking
• Metering
• White Goods
• Optical
• Medical Applications