• Single 1.7 V - 3.6 V supply
• Serial Peripheral Interface (SPI) compatible
• Supports SPI modes 0 and 3
• Supports RapidS™ operation
• Continuous read capability through entire array
• Up to 85 MHz
• Low-power read option up to 15 MHz
• Clock-to-output time (tV) of 6 ns maximum
• User configurable page size
• 256 bytes per page
• 264 bytes per page (default)
• Page size can be factory pre-configured for 256 bytes
• Two fully independent SRAM data buffers (256/264 bytes)
• Allows receiving data while reprogramming the main memory array
• Flexible programming options
• Byte/Page Program (1 to 256/264 bytes) directly into main memory
• Buffer Write
• Buffer to Main Memory Page Program
• Flexible erase options
• Page Erase (256/264 bytes)
• Block Erase (2 kB)
• Sector Erase (64 kB)
• Chip Erase (8 Mbits)
• Program and Erase Suspend/Resume
• Advanced hardware and software data protection features
• Individual sector protection
• Individual sector lockdown to make any sector permanently read-only
• 128-byte, One-Time Programmable (OTP) Security Register
• 64 bytes factory programmed with a unique identifier
• 64 bytes user programmable
• Hardware and software controlled reset options
• JEDEC Standard Manufacturer and Device ID Read
• Low power dissipation
• 400 nA Ultra-Deep Power-Down current (typical)
• 4.5 μA Deep Power-Down current (typical)
• 25 μA Standby current (typical)
• 11 mA Active Read current (typical at 20 MHz)
• Endurance: 100,000 program/erase cycles per page minimum
• Data retention: 20 years
• Complies with full industrial temperature range
• Green (Pb/Halide-free/RoHS compliant) packaging options
• 8-lead SOIC (0.150" wide and 0.208" wide)
• 8-pad Ultra-thin DFN (5 x 6 x 0.6 mm)
• 8-ball (2 x4 array) Wafer Level Chip Scale Package
• Die in Wafer Form