• Single 1.65 V - 4.4 V Supply
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 and 3
• Supports Dual-I/O Operation
• 70 MHz Maximum Operating Frequency
• Clock-to-Output (tV) of 6 ns
• Flexible, Optimized Erase Architecture for Code and Data Storage Applications
• Small (256-Byte) Page Erase
• Uniform 4-kByte Block Erase
• Uniform 32-kByte Block Erase
• Uniform 64-kByte Block Erase
• Full Chip Erase
• Hardware Controlled Locking of Protected Sectors via WP Pin
• 128-byte, One-Time Programmable (OTP) Security Register
• 64 bytes factory programmed with a unique identifier
• 64 bytes user programmable
• Flexible Programming
• Byte/Page Program (1 to 256 Bytes)
• Dual-Input Byte/Page Program (1 to 256 Bytes)
• Sequential Program Mode Capability