Features
• JEDEC standard 1.8V power supply.
• VDD = 1.8V, VDDQ = 1.8V
• Four internal banks for concurrent operation
• MRS cycle with address key programs
-CAS latency 2, 3 (clock)
-Burst length (2, 4, 8, 16)
-Burst type (sequential & interleave)
• Fully differential clock inputs (CK, /CK)
• All inputs except data & DM are sampled at the rising
edge of the system clock
• Data I/O transaction on both edges of data strobe
• Bidirectional data strobe per byte of data (DQS)
• DM for write masking only
• Edge aligned data & data strobe output
• Center aligned data & data strobe input
• 64ms refresh period (8K cycle)
• Auto & self refresh
• Concurrent Auto Precharge
• Maximum clock frequency up to 208MHZ
• Maximum data rate up to 416Mbps/pin
• Power Saving support
-PASR (Partial Array Self Refresh)
-Auto TCSR (Temperature Compensated Self Refresh)
-Deep Power Down Mode
-Programmable Driver Strength Controlby Full Strength or 1/2, 1/4, 1/8 or 3/4 of Full Strength
• Status Register Read (SRR)
• LVCMOS compatible inputs/outputs
• Operation Temperature:
-Commercial(TA= 0 ~ 70 °C )
-Industrial(TA= -40 ~ 85 °C )
-Automotive, A1(TA= -40 ~ 85 °C )
-Automotive, A2(TA= -40 ~ 105 °C )