Features
1,048,576 word by 4 bit organization
Power Supply: 3.3 ±0.3V or 5.0 ±0.5V
Standard Power (SP) and Low Power (LP)
1024 Refresh Cycles
16 ms Refresh Rate (SP version)
128 ms Refresh Rate (LP version)
Power Dissipation
Active (max)
85 mA/70 mA (5.0V)
- 95 mA/80 mA (3.3V)
Standby Current: TTL Inputs (max)
2.0 mA (SP version)
1.0 mA (LP version)
Standby Current: CMOS Inputs (max)
- 1.0 mA (SP version)
- 0.15 mA (LP version)
Fast Page Mode
RAS Only, and CAS before RAS Refresh
Hidden Refresh
Self-Refresh (LP version only)
Packages: SOJ-26/20 (300mil)
TSOP-26/20 (300mil)

Description
The IBM014400 is a fast-page dynamic RAM organized 1,048,576 words by 4 bits. The devices are
fabricated in IBM's 4M-bit Shrink 2 CMOS silicon
gate technology. The circuits and process have
been designed to provide high performance, low
power dissipation, and high reliability. The devices
operate with either a 5.0V ± 0.5V or 3.3V ± 0.3V
power supply and are offered in a plastic 26/20 pin
SOJ (300mil) or TSOP (300mil) package. Refreshing may be accomplished by means of a CAS before
RAS refresh cycle (CBR) that internally generates
the refresh address. RAS - only refresh cycles can
also refresh all memory locations. Self-Refresh
mode is entered by holding RAS low for ≥ 100µS during a CBR cycle. Detection of this long RAS time
during a CBR cycle starts an internal oscillator that
maintains data integrity without external clocking. Self-Refresh mode is included as a standard feature
for Low Power devices (IBM014400M and
IBM014400P). Self Refresh operating current is
≤ 170μA (max) and typically ≤ 100μA. Alllow power
devices support Extended Data Retention of 128ms,
eight times (8x) the retention supported by IBM's
standard power devices.