1 Features
1• Fully configurable dual-rail design allows each
port to operate with a power supply range from
0.65 V to 3.6 V
• Operating temperature from –40°C to +125°C
• Glitch-free power supply sequencing
• Up to 380 Mbps support when translating from 1.8
V to 3.3 V
• VCC isolation feature
– If either VCC input is below 100 mV, all I/O
outputs are disabled and become high
impedance
• Ioff supports partial-power-down mode operation
• Compatible with AVC family level shifters
• Latch-up performance exceeds 100 mA per JESD
78, Class II
• ESD protection exceeds JESD 22
– 8000-V human-body model (HBM)
– 1000-V charged-device model (CDM)

2 Applications
• Enterprise and communications
• Industrial
• Personal electronics
• Wireless infrastructure
• Building automation
• Point of sale

3 Description
The SN74AXCH2T45 is a two-bit non-inverting bus
transceiver that uses two individually configurable
power-supply rails. The device is operational with
both VCCA and VCCB supplies as low as 0.65 V. The A
port is designed to track VCCA, which accepts any
supply voltage from 0.65 V to 3.6 V. The B port is
designed to track VCCB, which also accepts any
supply voltage from 0.65 V to 3.6 V. Additionally the
SN74AXCH2T45 is compatible with a single-supply
system.
The SN74AXCH2T45 device is designed for
asynchronous communication between data buses.
The device transmits data from the A bus to the B
bus or from the B bus to the A bus, depending on the
logic level of the direction-control input (DIR). The
SN74AXCH2T45 device is designed so the control
pin (DIR) is referenced to VCCA.
Active bus-hold circuitry holds unused or undriven
inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not
recommended. If a supply is present for VCCA or
VCCB, the bus-hold circuitry always remains active
on the A or B inputs respectively, independent of the
state of the direction control pin.
This device is fully specified for partial-power-down
applications using the Ioff current. The Ioff protection
circuitry ensures that no excessive current is drawn
from or to an input, output, or combined I/O that is
biased to a specific voltage while the device is
powered down.
The VCC isolation feature ensures that if either VCCA
or VCCB is less than 100 mV, both I/O ports enter a
high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either
supply rail to be powered on or off in any order while
providing robust power sequencing performance.