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TLV5608IDWG4.B Folha de dados (PDF) - Texas Instruments

TLV5608IDWG4.B Datasheet PDF - Texas Instruments
Nome de Peças TLV5608IDWG4.B
Download  TLV5608IDWG4.B Download
Tamanho do Arquivo   778.88 Kbytes
página   25 Pages
Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
Logo TI2 - Texas Instruments
Descrição Electrónicos 8-CHANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V LOW POWER DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

TLV5608IDWG4.B Datasheet (PDF)

Go To PDF Page Download Folha de dados
TLV5608IDWG4.B Datasheet PDF - Texas Instruments

Nome de Peças TLV5608IDWG4.B
Download  TLV5608IDWG4.B Click to download

Tamanho do Arquivo   778.88 Kbytes
página   25 Pages
Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
Logo TI2 - Texas Instruments
Descrição Electrónicos 8-CHANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V LOW POWER DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

TLV5608IDWG4.B Folha de dados (HTML) - Texas Instruments


TLV5608IDWG4.B Detalhes do produto

1FEATURES
2· Eight Voltage Output DACs in One Package
– TLV5610 . . . 12-Bit
– TLV5608 . . . 10-Bit
– TLV5629 . . . 8-Bit
· Programmable Settling Time vs Power
Consumption
– 1 ms In Fast Mode
– 3 ms In Slow Mode
· Compatible With TMS320 and SPI™ Serial
Ports
· Monotonic Over Temperature
· Low Power Consumption:
– 18 mW In Slow Mode at 3-V
– 48 mW In Fast Mode at 3-V
· Reference Input Buffers
· Power-Down Mode
· Buffered, High Impedance Reference Inputs
· Data Output for Daisy-Chaining

APPLICATIONS
· Digital Servo Control Loops
· Digital Offset and Gain Adjustment
· Industrial Process Control
· Machine and Motion Control Devices
· Mass Storage Devices

DESCRIPTION
The TLV5610, TLV5608, and TLV5629 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs
each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and
Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.
Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs,
and a data output which can be used to cascade multiple devices.
The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to
allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be
connected to the supply voltage.
Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and
can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and
TSSOP packages.




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