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SN74AVC16722DGGR.B Folha de dados (PDF) - Texas Instruments

SN74AVC16722DGGR.B Datasheet PDF - Texas Instruments
Nome de Peças SN74AVC16722DGGR.B
Download  SN74AVC16722DGGR.B Download
Tamanho do Arquivo   586.61 Kbytes
página   14 Pages
Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
Logo TI2 - Texas Instruments
Descrição Electrónicos 22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

SN74AVC16722DGGR.B Datasheet (PDF)

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SN74AVC16722DGGR.B Datasheet PDF - Texas Instruments

Nome de Peças SN74AVC16722DGGR.B
Download  SN74AVC16722DGGR.B Click to download

Tamanho do Arquivo   586.61 Kbytes
página   14 Pages
Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
Logo TI2 - Texas Instruments
Descrição Electrónicos 22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

SN74AVC16722DGGR.B Folha de dados (HTML) - Texas Instruments


SN74AVC16722DGGR.B Detalhes do produto

Member of the Texas Instruments
WidebusE Family
EPICE (Enhanced-Performance Implanted
CMOS) Submicron Process
DOCE (Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without
Speed Degradation
Dynamic Drive Capability Is Equivalent to
Standard Outputs With IOH and IOL of
±24 mA at 2.5-V VCC
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class I
Packaged in Thin Shrink Small-Outline
Package

description
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1
shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC
Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOCE)
Circuitry Technology and Applications, literature number SCEA009.
This 22-bit flip-flop is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC
operation.
The 22 flip-flops of the SN74AVC16722 are edge-triggered D-type flip-flops with clock-enable (CLKEN) input.
On the positive transition of the clock (CLK) input, the device stores data into the flip-flops if CLKEN is low. If
CLKEN is high, no data is stored.
A buffered output-enable (OE) input places the 22 outputs in either a normal logic state (high or low) or the
high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.




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