Benefits
512-channel in a 23 x 15 mm² FBGA package
Ultra-low noise of 0.29 fC at 0.5 μA input current in low noise mode
Lowest power dissipation of 1.25 mW per channel in low power mode
Adjustable integration time down to 51 μs (20 kSPS) at 20-bit resolution. Up to 26-bit at integration times of 1 ms
Zero biased photodiodes (true ground concept) for ultra-low dark currents
Integral linearity of ±0.080% of reading and ±0.2 ppm of full-scale range (all channels active)
Automatic zero offset calibration, input charge calibration and linearity calibration

Features
No external components required. Integrated capacitors for supply and reference decoupling
No charge loss. Continuous charge integration due to zero dead time of ADC architecture
Selectable full-scale range of 0.5 μA in low range and 1 μA in high range
Adjustable full-scale range, integration time and power consumption via SPI interface as well as adjustable output modes via LVDS
Selectable power supply concept between dual ±1.5 V analog supply (true ground concept) or single +3.0 V analog supply
On-chip LDOs, voltage references and temperature sensor
Built-in diagnostic modes for testing full detector signal chain