Features/Benefits
• Low-power push-pull HCSL outputs; eliminate 24 resistors,
save 41mm2 of area
• Pin compatible to 9ZX21201; easy path to >50% power
savings
• Space-saving 64 VFQFPN package
• Fixed feedback path for 0ps input-to-output delay
• 9 Selectable SMBus Addresses; multiple devices can
share the same SMBus Segment
• 12 OE# pins; hardware control of each output
• PLL or bypass mode; PLL can dejitter incoming clock
• Selectable PLL bandwidth; minimizes jitter peaking in
downstream PLL's
• Spread Spectrum Compatible; tracks spreading input clock
for low EMI