1 Features
• 2-Bit bidirectional translator for SDA and SCL lines
in mixed-mode I2C applications
• Standard-mode, fast-mode, and fast-mode plus
I2C and SMBus compatible
• I3C compatible (12.5 MHz supported)
• Allows voltage-level translation between
– 0.9-V VREF1 and 1.8-V, 2.5-V, 3.3-V,
or 5-V VREF2
– 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V,
or 5-V VREF2
– 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
– 2.5-V VREF1 and 3.3-V or 5-V VREF2
– 3.3-V VREF1 and 5-V VREF2
• Provides bidirectional voltage translation with no
direction Pin
• Low ON-state resistance between input and output
ports provides less signal distortion
• Open-drain I2C I/O ports (SCL1, SDA1, SCL2, and
SDA2)
• 5-V Tolerant I2C I/O ports to support mixed-mode
signal operation
• High-impedance SCL1, SDA1, SCL2, and SDA2
pins for EN = Low
• Lockup-free operation for isolation when EN = Low
• Flow-through pinout for ease of printed-circuitboard
trace routing
• ESD Protection Exceeds JESD 22
– 2000-V human-body model (A114-A)
– 1000-V charged-device model (C101)

2 Applications
• I2C, SMBus, PMBus, MDIO, UART, low-speed
SDIO, GPIO, and other two-signal interfaces
• Servers
• Routers (telecom switching equipment)
• Personal computers
• Industrial automation

3 Description
The TCA39306 is a dual bidirectional voltage-level
translator compatible with I2C, SMBus, and I3C with
an enable (EN) input, and is operational from 0.9-V to
3.3-V VREF1 and 1.8-V to 5.5-V VREF2.
The device allows bidirectional voltage translations
between 0.85 V and 5 V, without the use of a
direction pin. The low ON-state resistance (RON)
of the switch allows connections to be made with
minimal propagation delay. When EN is high, the
translator switch is ON, and the SCL1 and SDA1
I/O are connected to the SCL2 and SDA2 I/O,
respectively, allowing bidirectional data flow between
ports. When EN is low, the translator switch is off, and
a high-impedance state exists between ports.
In addition to voltage translation, the TCA39306 can
be used to isolate a higher speed bus from a lower
speed bus by controlling the EN pin to disconnect the
slower bus during fast-mode communication.