Features
• M68HC11 CPU
• 256 Bytes of On-Chip Static RAM
• 1024 Bytes of Bootstrap ROM (Available in Single-Chip, Bootstrap, and Special-Test Modes)
• Power Saving STOP and WAIT Modes
• 64 Kbyte Address Space, Expandable to 256 Kbytes Using On-Chip Memory Mapping Logic
• Multiplexed Address/Data Bus
• 16-Bit Timer System
— Three Input Capture (IC) Channels
— Four Output Compare (OC) Channels
— One Additional Channel, Software Selectable as Fourth IC or Fifth OC
• 8-Bit Pulse Accumulator
• Real-Time Interrupt Circuit
• Computer Operating Properly (COP) Watchdog Timer
• Clock Monitor
• Five External General-Purpose Chip Select Signals, Each with Programmable Clock Stretching
• One External Vector/Program Chip Select with Programmable Clock Stretching
• Nine External Interrupt Request Inputs (One Nonmaskable Interrupt)
• Two 8-Bit Pulse-Width Modulation (PWM) Timer Channels (Concatenate for a Single 16-Bit PWM)
• Four-Channel 8-Bit Analog-to-Digital (A/D) Converter
• Asynchronous Nonreturn to Zero (NRZ) Serial Communications Interface (SCI)
• Synchronous Serial Peripheral Interface (SPI)
• Six Input/Output (I/O) Ports (35 Pins)
— 31 Bidirectional
— 4 Input Only
• All Bidirectional Port Pins Have Selectable Internal Pull-Up Devices
• Available in 68-Pin Plastic Leaded Chip Carrier (PLCC) and 64-Pin Quad Flat Pack (QFP)