DESCRIPTION
The TC551001BPL/BFL/BFTL/BTRL is a 1,048,576-bit static random access memory (SRAM) organized as
131,072 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 5 V ± 10% power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 5 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed
in low-power mode at 2 A standby current (typ) when chip enable (CE1) is asserted high or (CE2) is asserted
low. There are three control inputs. CE1 and CE2 are used to select the device and for data retention control,
and output enable (OE) provides fast memory access. This device is well suited to various microprocessor
system applications where high speed, low power and battery backup are required. The TC551001BPL/BFL/
BFTL/BTRL is available in a standard plastic 32-pin dual-in-line package (DIP), plastic 32-pin small-outline
package (SOP) and normal and reverse pinout plastic 32-pin thin-small-outline package (TSOP).

FEATURES
Low-power dissipation
Operating: 27.5 mW/MHz (typical)
Standby current of 100 A (maximum)
Single power supply voltage of 5 V ± 10%
Power down features using CE1 and CE2.
Data retention supply voltage of 2 to 5.5 V
• Direct TTL compatibility for all inputs and
outputs
Access Times (maximum):
Access Time
CE1 Access Time
CE2 Access Time
OE Access Time
TC551001BPL/BFL/BFTL/BTRL
-85
-70
70 ns
70 ns
70 ns
35 ns
85 ns
85 ns
● Packages: DIP32-P-600 (BPL)
SOP32-P-525 (BFL)
85 ns
45 ns
-10
100 ns
100 ns
100 ns
50 ns
(Weight: 4.45 g typ)
(Weight: 1.04 g typ)
TSOP32-P-0820 (BFTL) (Weight: 0.34 g typ)
TSOP32-P-0820A (BTRL) (Weight: 0.34 g typ)