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ST10F296 Folha de dados(PDF) 341 Page - STMicroelectronics

Nome de Peças ST10F296
Descrição Electrónicos  High performance 16-bit CPU with DSP functions
PDF  346 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F296 Folha de dados(HTML) 341 Page - STMicroelectronics

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ST10F296E
Electrical characteristics
341/346
Figure 120. SSC slave timing
1.
The phase and polarity of the shift and latch edges of SCLK are programmable. Figure 120 uses the
leading clock edge as the shift edge with the latch on the trailing edge (SSCPH = 0b). The idle clock line is
low and the leading clock edge is low-to-high transition (SSCPO = 0b).
2.
The bit timing is repeated for all bits that have to be transmitted or received.
1st out bit
Last out bit
2nd out bit
2nd in bit
1st in bit
Last in bit
SCLK
MRST
MTSR
t
315
t
315
t
315
t
316
t
318
t
317
t
317
t
318
t
310
t
311
t
312
t
313
t
314
(1)
(2)
Obsolete
Product(s)
- Obsolete
Product(s)



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