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STM32F413RG Folha de dados(PDF) 149 Page - STMicroelectronics |
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STM32F413RG Folha de dados(HTML) 149 Page - STMicroelectronics |
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149 / 207 page ![]() DocID029162 Rev 2 149/207 STM32F413xG/H Electrical characteristics 174 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 50 or Figure 51, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 50. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF- inputs are both available on UFBGA100. VREF+ is also available on LQFP100. When VREF+ and VREF- are not available, they are internally connected to VDDA and VSSA. |
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