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STM32F479II Folha de dados(PDF) 157 Page - STMicroelectronics |
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STM32F479II Folha de dados(HTML) 157 Page - STMicroelectronics |
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157 / 208 page  DocID028010 Rev 2 157/208 STM32F479xx Electrical characteristics 187 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 54 or Figure 55, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 54. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176. VREF+ is also available on LQFP100, LQFP144, and LQFP176. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. Figure 55. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176. VREF+ is also available on LQFP100, LQFP144, and LQFP176. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. |
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