9DMU0431 datasheet(7/11 Pages) IDT

Nome de Peças	9DMU0431

Descrição Electrónicos	HCSL differential inputs

PDF	11 Pages

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Fabricante Electrônico	IDT [Integrated Device Technology]

Página de início	http://www.idt.com

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7 / 11 page

REVISION A 09/24/14

7

2:4 1.5V PCIE GEN1-2-3 CLOCK MUX

9DMU0431 DATASHEET

Electrical Characteristics–Output Duty Cycle, Jitter, Skew and PLL Characteristics

Electrical Characteristics–Phase Jitter Parameters

TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

NOTES

Duty Cycle Distortion

tDCD

Measured differentially, Bypass Mode @100MHz

-1

-0.05

1

%

1,3

Skew, Input to Output

tpdBYP

Bypass Mode, VT = 50%

2046

2864

4010

ps

1

Skew, Output to Output

tsk3

VT = 50%

19

50

ps

1,4

Jitter, Cycle to cycle

tjcyc-cyc

Additive Jitter in Bypass Mode

0.1

5

ps

1,2

1 Guaranteed by design and characterization, not 100% tested in production.

easured from differential waveform

4 All outputs at default slew rate

5 The MIN/TYP/MAX values of each BW setting track each other, i.e., Low BW MAX will never occur with Hi BW MIN.

TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

INDUSTRY

LIMIT

UNITS

Notes

tjphPCIeG1

PCIe Gen 1

1.3

5

N/A

ps (p-p) 1,2,3,5

PCIe Gen 2 Lo Band

10kHz < f < 1.5MHz

0.1

0.5

N/A

ps

(rms)

1,2,3,4,

5

PCIe Gen 2 High Band

1.5MHz < f < Nyquist (50MHz)

0.1

0.6

N/A

ps

(rms)

1,2,3,4

tjphPCIeG3

PCIe Gen 3

(PLL BW of 2-4 or 2-5MHz, CDR = 10MHz)

0.170

0.3

N/A

ps

(rms)

1,2,3,4

tjph125M0

125MHz, 1.5MHz to 10MHz, -20dB/decade

rollover < 1.5MHz, -40db/decade rolloff > 10MHz

365

380

N/A

fs

(rms)

1,6

tjph125M1

125MHz, 12KHz to 20MHz, -20dB/decade

rollover < 12kHz, -40db/decade rolloff > 20MHz

535

550

N/A

fs

(rms)

1,6

1Guaranteed by design and characterization, not 100% tested in production.

4 For RMS figures, additive jitter is calculated by solving the following equation: Additive jitter = SQRT[(total jitter)^2 - (input jitter)^2]

5 Driven by 9FGU0831 or equivalent

6 Rohde&Schartz SMA100

3 Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.

Additive Phase Jitter,

Bypass Mode

tjphPCIeG2

2 See http://www.pcisig.com for complete specs

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