REVISION A 09/24/14

3

2:4 1.5V PCIE GEN1-2-3 CLOCK MUX

9DMU0431 DATASHEET

Pin Descriptions (cont.)

Pin#

Pin Name

Type

Pin Description

16

VDD1.5

PWR

Power supply, nominally 1.5V

17

DIF2

OUT

Differential true clock output

18

DIF2#

OUT

Differential Complementary clock output

19

^OE2#

IN

Active low input for enabling DIF pair 2. This pin has an internal pull-up resistor.

1 =disable outputs, 0 = enable outputs

20

DIF3

OUT

Differential true clock output

21

DIF3#

OUT

Differential Complementary clock output

22

^OE3#

IN

Active low input for enabling DIF pair 3. This pin has an internal pull-up resistor.

1 =disable outputs, 0 = enable outputs

23

^SEL_A_B#

IN

Input to select differential input clock A or differential input clock B. This input has an internal

pull-up resistor.

0 = Input B selected, 1 = Input A selected.

24

GNDR

GND

Analog Ground pin for the differential input (receiver)

25

EPAD

GND

Connect to Ground.