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R5F6451MLFD Folha de dados(PDF) 114 Page - Renesas Technology Corp |
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R5F6451MLFD Folha de dados(HTML) 114 Page - Renesas Technology Corp |
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114 / 122 page ![]() R01DS0072EJ0120 Rev.1.20 Page 114 of 116 Aug 07, 2013 R32C/151 Group 5. Electrical Characteristics Figure 5.8 Timing of Peripherals TAiIN input TAiOUT input t c(TA) t w(TAH) t w(TAL) t c(UP) t w(UPH) t w(UPL) TAiIN input (in falling edge counting) TAiOUT input (input for increment/ decrement switching) In event counter mode TAiIN input (in rising edge counting) t h(TIN-UP) TBiIN input ADTRG input t c(TB) t w(TBH) t w(TBL) t w(ADL) CLKi t c(CK) t w(CKH) t w(CKL) TXDi t d(C-Q) t h(C-Q) RXDi t su(D-C) t h(C-D) INTi input t w(INL) t w(INH) NMI input Two CPU clock cycles + 300 ns or more Two CPU clock cycles + 300 ns or more t su(UP-TIN) t w(ADH) |
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