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PIC16F883-E/SO. Folha de dados(PDF) 129 Page - Microchip Technology

Nome de Peças PIC16F883-E/SO.
Descrição Electrónicos  28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers
PDF  338 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
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PIC16F883-E/SO. Folha de dados(HTML) 129 Page - Microchip Technology

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 2006-2012 Microchip Technology Inc.
DS41291G-page 129
PIC16F882/883/884/886/887
11.2
Capture/Compare/PWM (CCP2)
The Capture/Compare/PWM module is a peripheral
which allows the user to time and control different
events. In Capture mode, the peripheral allows the
timing of the duration of an event. The Compare mode
allows the user to trigger an external event when a
predetermined amount of time has expired. The PWM
mode can generate a Pulse-Width Modulated signal of
varying frequency and duty cycle.
The timer resources used by the module are shown in
Table 11-2.
Additional information on CCP modules is available in
the Application Note AN594, “Using the CCP Modules”
(DS00594).
TABLE 11-2:
CCP MODE – TIMER
RESOURCES REQUIRED
CCP Mode
Timer Resource
Capture
Timer1
Compare
Timer1
PWM
Timer2
REGISTER 11-2:
CCP2CON: CCP2 CONTROL REGISTER
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
DC2B1
DC2B0
CCP2M3
CCP2M2
CCP2M1
CCP2M0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘0’
bit 5-4
DC2B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR2L.
bit 3-0
CCP2M<3:0>: CCP2 Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP2 module)
0001 = Unused (reserved)
0010 = Unused (reserved)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP2IF bit is set)
1001 = Compare mode, clear output on match (CCP2IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP2IF bit is set, CCP2 pin
is unaffected)
1011 = Compare mode, trigger special event (CCP2IF bit is set, TMR1 is reset and A/D
conversion is started if the ADC module is enabled. CCP2 pin is unaffected.)
11xx = PWM mode.



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