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SPC564L54L5 Folha de dados(PDF) 159 Page - STMicroelectronics |
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SPC564L54L5 Folha de dados(HTML) 159 Page - STMicroelectronics |
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159 / 160 page  SPC56XL60/54 Revision history Doc ID 15457 Rev 8 159/160 01-Aug-2012 8 (cont.) –In Table 19 (Voltage regulator electrical specifications), changed the “Digital supply high voltage detector upper threshold low limit (After a destructive reset initialization phase completion)” from 1.43V to 1.38V. – Added Table 18 (Recommended operating characteristics). – Updated the IDD values in Table 21 (Current consumption characteristics). Changed conditions text from “1.2 supplies during LBIST (full LBIST configuration)” to “1.2 V supplies” for all the IDD parameters except IDD_LV_BIST+IDD_LV_PLL. Added footnote in “Conditions” for the DPM mode. – Removed Cut references from the whole document. In Table 26 (ADC conversion characteristics), changed the sampling frequency value from ‘1 MHz’ to ‘983.6 KHz’. Table 44. Document revision history (continued) Date Revision Changes |
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