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ATMEGA329P Folha de dados(PDF) 47 Page - ATMEL Corporation |
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ATMEGA329P Folha de dados(HTML) 47 Page - ATMEL Corporation |
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47 / 385 page  47 8021E–AVR–07/09 ATmega329P/3290P 10.3 Internal Voltage Reference ATmega329P/3290P features an internal bandgap reference. This reference is used for Brown- out Detection, and it can be used as an input to the Analog Comparator or the ADC. 10.3.1 Voltage Reference Enable Signals and Start-up Time The voltage reference has a start-up time that may influence the way it should be used. The start-up time is given in ”System and Reset Characteristics” on page 330. To save power, the reference is not always turned on. The reference is on during the following situations: 1. When the BOD is enabled (by programming the BODLEVEL [1..0] Fuse). 2. When the bandgap reference is connected to the Analog Comparator (by setting the ACBG bit in ACSR). 3. When the ADC is enabled. Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user must always allow the reference to start up before the output from the Analog Comparator or ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three conditions above to ensure that the reference is turned off before entering Power-down mode. 10.4 Watchdog Timer The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1 MHz. This is the typical value at V CC = 5V. See characterization data for typical values at other VCC levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in Table 10-2 on page 50. The WDR – Watchdog Reset – instruction resets the Watch- dog Timer. The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs. Eight different clock cycle periods can be selected to determine the reset period. If the reset period expires without another Watchdog Reset, the ATmega329P/3290P resets and executes from the Reset Vector. For timing details on the Watchdog Reset, refer to Table 10-2 on page 50. To prevent unintentional disabling of the Watchdog or unintentional change of time-out period, two different safety levels are selected by the fuse WDTON as shown in Table 10-1. Refer to ”Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 48 for details. Table 10-1. WDT Configuration as a Function of the Fuse Settings of WDTON WDTON Safety Level WDT Initial State How to Disable the WDT How to Change Time- out Unprogrammed 1 Disabled Timed sequence Timed sequence Programmed 2 Enabled Always enabled Timed sequence |
Nº de peça semelhante - ATMEGA329P_1 |
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Descrição semelhante - ATMEGA329P_1 |
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