M38045F2HKP datasheet(317/387 Pages) RENESAS

317 / 387 page

3-27

REJ09B0212-0100Z

Rev.1.00

Jan 14, 2005

3804 Group (Spec.H)

APPENDIX

3.3 Notes on use

3.3.1 Notes on input and output ports

(1)

Notes in standby state

In standby state✽1 for low-power dissipation, do not make input levels of an I/O port “undefined”.

Even when an I/O port of N-channel open-drain is set as output mode, if output data is “1”, the

aforementioned notes are necessary.

Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a

resistor.

When determining a resistance value, note the following points:

• External circuit

• Variation of output levels during the ordinary operation

When using built-in pull-up resistor, note on varied current values:

• When setting as an input port : Fix its input level

• When setting as an output port : Prevent current from flowing out to external

q Reason

Exclusive input ports are always in a high-impedance state. An output transistor becomes an OFF

state when an I/O port is set as input mode by the direction register, so that the port enter a high-

impedance state. At this time, the potential which is input to the input buffer in a microcomputer is

unstable in the state that input levels are “undefined”. This may cause power source current. Even

when an I/O port of N-channel open-drain is set as output mode by the direction register, if the

contents of the port latch is “1”, the same phenomenon as that of an input port will occur.

✽1 standby state: Stop mode by executing STP instruction

Wait mode by executing WIT instruction

(2)

Modifying output data with bit managing instruction

When the port latch of an I/O port is modified with the bit managing instruction✽2, the value of the

unspecified bit may be changed.

q Reason

The bit managing instructions are read-modify-write form instructions for reading and writing data

by a byte unit. Accordingly, when these instructions are executed on a bit of the port latch of an

I/O port, the following is executed to all bits of the port latch.

•As for bit which is set for input port:

The pin state is read in the CPU, and is written to this bit after bit managing.

•As for bit which is set for output port:

The bit value is read in the CPU, and is written to this bit after bit managing.

Note the following:

•Even when a port which is set as an output port is changed for an input port, its port latch holds

the output data.

•As for a bit of which is set for an input port, its value may be changed even when not specified

with a bit managing instruction in case where the pin state differs from its port latch contents.

✽2 Bit managing instructions: SEB and CLB instructions

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