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STM32L433CBU3P Folha de dados(PDF) 166 Page - STMicroelectronics |
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STM32L433CBU3P Folha de dados(HTML) 166 Page - STMicroelectronics |
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166 / 227 page ![]() Electrical characteristics STM32L433xx 166/19 DS11449 Rev 7 Figure 32. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function 1. Refer to Table 76: ADC characteristics for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 70: I/O static characteristics). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 70: I/O static characteristics for the values of Ilkg. 4. Refer to Figure 18: Power supply scheme. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 18: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. MSv67871V3 Sample-and-hold ADC converter Converter Cparasitic (2) Ilkg (3) CADC VDDA (4) RAIN (1) VAIN RADC VREF+ (4) VSSA I/O analog switch Sampling switch with multiplexing VSS VSS |
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