L9908 datasheet(147/152 Pages) STMICROELECTRONICS

147 / 152 page

List of tables

Table 1.

Pin list description ................................................................... 4

Table 2.

Safety related digital input pins functional partitioning ........................................... 6

Table 3.

NDIS and EN_BR electrical characteristics .................................................. 6

Table 4.

Functional operating conditions .......................................................... 7

Table 5.

Parametrical operating conditions ....................................................... 10

Table 6.

Absolute maximum ratings ............................................................ 10

Table 7.

ESD resistivity (pin level) ............................................................. 14

Table 8.

Temperature ranges and thermal data .................................................... 14

Table 9.

Quiescent current consumption in reset mode ............................................... 16

Table 10.

Mean current consumptions in normal mode ................................................ 16

Table 11.

Internal power supply electrical characteristics............................................... 21

Table 12.

VDD monitor electrical characteristics..................................................... 22

Table 13.

SW reset activation register............................................................ 24

Table 14.

Internal resets sources and filtering ...................................................... 24

Table 15.

Power up/down timings............................................................... 27

Table 16.

Operation mode status bits ............................................................ 28

Table 17.

Device operation modes summary ....................................................... 28

Table 18.

CONFIG mode activation register........................................................ 29

Table 19.

CFG timeout ...................................................................... 30

Table 20.

Self-test selection bits................................................................ 30

Table 21.

Self-test mode activation register ........................................................ 30

Table 22.

Self-test procedure status bits .......................................................... 31

Table 23.

Self-test timings and timeout ........................................................... 31

Table 24.

Fault summary..................................................................... 32

Table 25.

Fault reaction configuration bits ......................................................... 33

Table 26.

Internal managed faults reaction details ................................................... 34

Table 27.

Fault output redirection configuration bit ................................................... 34

Table 28.

IC ERR status bits .................................................................. 34

Table 29.

Fault output redirection configuration bit ................................................... 35

Table 30.

EN_BR minimum t_off time ............................................................ 36

Table 31.

Digital input pins functional partitioning .................................................... 43

Table 32.

Digital input electrical characteristics (Control Loop Pins) ....................................... 44

Table 33.

Digital output pins functional partitioning ................................................... 44

Table 34.

Digital output electrical characteristics .................................................... 44

Table 35.

Internal clock electrical characteristics .................................................... 44

Table 36.

Clock spread spectrum electrical characteristics ............................................. 45

Table 37.

Clock spread spectrum enable bit ....................................................... 45

Table 38.

Internal clock monitor electrical characteristics............................................... 45

Table 39.

Motor battery monitor UV threshold configuration bits .......................................... 46

Table 40.

Motor battery monitor OV threshold configuration bits .......................................... 46

Table 41.

Motor battery monitor filtering configuration bits .............................................. 46

Table 42.

Motor battery monitor electrical characteristics............................................... 46

Table 43.

Charge pump 1 enable bit ............................................................. 49

Table 44.

Pre-regulation stage electrical characteristics ............................................... 49

Table 45.

VBP monitor UV threshold configuration bits ................................................ 50

Table 46.

VBP monitor OV threshold configuration bits ................................................ 50

Table 47.

VBP monitor filtering configuration bits .................................................... 50

Table 48.

VBP monitor electrical characteristics ..................................................... 51

Table 49.

VPRE Monitor electrical characteristics.................................................... 53

Table 50.

Charge pump 2 enable bit ............................................................. 54

Table 51.

Charge pump 2 electrical characteristics ................................................... 54

Table 52.

Bootstrap limiter 1 disable bit........................................................... 55

Table 53.

Bootstrap limiter 1 electrical characteristics ................................................. 56

L9908

List of tables

DS13546 - Rev 5

page 147/152

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