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STM32G474VC Folha de dados(PDF) 190 Page - STMicroelectronics |
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STM32G474VC Folha de dados(HTML) 190 Page - STMicroelectronics |
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190 / 232 page  Electrical characteristics STM32G474xB STM32G474xC STM32G474xE 190/232 DS12288 Rev 1 Synchronous waveforms and timings Figure 43 through Figure 46 represent synchronous waveforms and Table 102 through Table 105 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • BurstAccessMode = FMC_BurstAccessMode_Enable • MemoryType = FMC_MemoryType_CRAM • WriteBurst = FMC_WriteBurst_Enable • CLKDivision = 1 • DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM In all timing tables, the THCLK is the HCLK clock period. • For 2.7 V ≤ VDD ≤ 3.6 V, maximum FMC_CLK = 60 MHz for CLKDIV = 0x1 and 54 MHz for CLKDIV = 0x0 at CL = 30 pF (on FMC_CLK). • For 1.71 V ≤ VDD ≤ 2.7 V, maximum FMC_CLK = 60 MHz for CLKDIV = 0x1 and 32 MHz for CLKDIV = 0x0 at CL= 20 pF (on FMC_CLK). Figure 43. Synchronous multiplexed NOR/PSRAM read timings |
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