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KSZ9567R Folha de dados(PDF) 110 Page - Microchip Technology |
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KSZ9567R Folha de dados(HTML) 110 Page - Microchip Technology |
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110 / 233 page ![]() KSZ9567R DS00002329E-page 110 2022 Microchip Technology Inc. and its subsidiaries 5.1.5.7 ALU Table Index 1 Register The ALU Table Index 0 Register and ALU Table Index 1 Register contain the index values for searching and reading/ writing the address lookup table as specified by the action in the ALU Table Access Control Register. For additional infor- mation on ALU tables, refer to Section 5.3.1, "Address Lookup (ALU) Table," on page 187. 5.1.5.8 ALU Table Access Control Register This register provides control and status for searching and reading or writing the ALU Table. The ALU Table Index 0 Register and ALU Table Index 1 Register contain the index values, while the ALU / Static Address Table Entry 1 Register, ALU / Static Address / Reserved Multicast Table Entry 2 Register, ALU / Static Address Table Entry 3 Register, and ALU / Static Address Table Entry 4 Register are used for the entry values. Refer to Section 5.3.1, "Address Lookup (ALU) Table," on page 187 for additional information on ALU tables. Address: 0x0414 - 0x0417 Size: 32 bits Bits Description Type Default 31:0 MAC Index [31:0] These are the lower 32 bits of the MAC addressed used to hash index the address lookup table. If direct addressing is enabled, then bits [11:0] are used to directly index the address lookup table. R/W 0x00000000 Address: 0x0418 - 0x041B Size: 32 bits Bits Description Type Default 31:30 RESERVED RO 00b 29:16 VALID_COUNT Indicates the total number of valid entries in the table after the search finishes RO 0x0000 15:8 RESERVED RO 0x00 7 START_FINISH 1 = Start the action defined below 0 = Action finished R/W, SC 0b 6 VALID For search operation. It is cleared when register 0x042F (ALU / Static Address Table Entry 4 Register) is read. 1 = Indicates that the next valid entry is ready 0 = Next valid entry is not ready RO 0b 5 VALID_ENTRY_OR_SEARCH_END For search operation. It is intended for added convenience when accessing registers by in-band management (IBA) rather than SPI or I2C. It combines bits 6 and 7. 1 = Indicates either that the next valid entry is ready, or that the search has ended. 0 = Neither next valid entry ready nor search ended. RO 0b 4:3 RESERVED R/W 00b |
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