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ATMEGA325P Folha de dados(PDF) 59 Page - ATMEL Corporation

Nome de Peças ATMEGA325P
Descrição Electrónicos  8-bit Microcontroller with 32K Bytes In-System Programmable Flash
PDF  336 Pages
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Fabricante Electrônico  ATMEL [ATMEL Corporation]
Página de início  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATMEGA325P Folha de dados(HTML) 59 Page - ATMEL Corporation

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8023A–AVR–12/06
ATmega325P/3250P
11. External Interrupts
11.1
Overview
The External Interrupts are triggered by the INT0 pin or any of the PCINT30:0 pins. Observe
that, if enabled, the interrupts will trigger even if the INT0 or PCINT30:0 pins are configured as
outputs. This feature provides a way of generating a software interrupt. The pin change interrupt
PCI1 will trigger if any enabled PCINT15:8 pin toggles. Pin change interrupts PCI0 will trigger if
any enabled PCINT7:0 pin toggles. The PCMSK3, PCMSK2, PCMSK1, and PCMSK0 Registers
control which pins contribute to the pin change interrupts. Pin change interrupts on PCINT30:0
are detected asynchronously. This implies that these interrupts can be used for waking the part
also from sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as
indicated in the specification for the ”EICRA – External Interrupt Control Register A” on page 60.
When the INT0 interrupt is enabled and is configured as level triggered, the interrupt will trigger
as long as the pin is held low. Note that recognition of falling or rising edge interrupts on INT0
requires the presence of an I/O clock, described in ”Clock Systems and their Distribution” on
page 29. Low level interrupt on INT0 is detected asynchronously. This implies that this interrupt
can be used for waking the part also from sleep modes other than Idle mode. The I/O clock is
halted in all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as described
in ”System Clock and Clock Options” on page 29.


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