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ATMEGA325P Folha de dados(PDF) 35 Page - ATMEL Corporation |
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ATMEGA325P Folha de dados(HTML) 35 Page - ATMEL Corporation |
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35 / 336 page  35 8023A–AVR–12/06 ATmega325P/3250P When this clock source is selected, start-up times are determined by the SUT Fuses as shown in Table 2. When applying an external clock, it is required to avoid sudden changes in the applied clock fre- quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the MCU is kept in Reset during such changes in the clock frequency. Note that the System Clock Prescaler can be used to implement run-time changes of the internal clock frequency while still ensuring stable operation. Refer to ”System Clock Prescaler” on page 36 for details. 7.8 Clock Output Buffer When the CKOUT Fuse is programmed, the system Clock will be output on CLKO. This mode is suitable when the chip clock is used to drive other circuits on the system. The clock will be out- put also during reset and the normal operation of I/O pin will be overridden when the fuse is programmed. Any clock source, including internal RC Oscillator, can be selected when CLKO serves as clock output. If the System Clock Prescaler is used, it is the divided system clock that is output when the CKOUT Fuse is programmed. 7.9 Timer/Counter Oscillator ATmega325P/3250P uses the same crystal oscillator for Low-frequency Oscillator and Timer/Counter Oscillator. See ”Low-frequency Crystal Oscillator” on page 32 for details on the oscillator and crystal requirements. ATmega325P/3250P share the Timer/Counter Oscillator Pins (TOSC1 and TOSC2) with XTAL1 and XTAL2. When using the Timer/Counter Oscillator, the system clock needs to be four times the oscillator frequency. Due to this and the pin sharing, the Timer/Counter Oscillator can only be used when the Calibrated Internal RC Oscillator is selected as system clock source. Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is written to logic one. See ”Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Prescaler (fclk_I/O/8)” on page 147 for further description on selecting external clock as input instead of a 32.768 kHz watch crystal. Table 1. Crystal Oscillator Clock Frequency CKSEL3..0 Frequency Range 0000 0 - 16 MHz Table 2. Start-up Times for the External Clock Selection SUT1..0 Start-up Time from Power- down and Power-save Additional Delay from Reset (VCC = 5.0V) Recommended Usage 00 6 CK 14CK BOD enabled 01 6 CK 14CK + 4.1 ms Fast rising power 10 6 CK 14CK + 65 ms Slowly rising power 11 Reserved |
Nº de peça semelhante - ATMEGA325P_06 |
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Descrição semelhante - ATMEGA325P_06 |
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