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HC705JJ7GRS/D Folha de dados(PDF) 191 Page - NXP Semiconductors

Nome de Peças HC705JJ7GRS/D
Descrição Electrónicos  Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)
PDF  230 Pages
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Fabricante Electrônico  NXP [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705JJ7GRS/D Folha de dados(HTML) 191 Page - NXP Semiconductors

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Instruction Set
Instruction Types
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
General Release Specification
Instruction Set
14.3.8 Relative
Relative addressing is only for branch instructions. If the branch
condition is true, the CPU finds the effective branch destination by
adding the signed byte following the opcode to the contents of the
program counter. If the branch condition is not true, the CPU goes to the
next instruction. The offset is a signed, two’s complement byte that gives
a branching range of –128 to +127 bytes from the address of the next
location after the branch instruction.
When using the Motorola assembler, the programmer does not need to
calculate the offset, because the assembler determines the proper offset
and verifies that it is within the span of the branch.
14.4 Instruction Types
The MCU instructions fall into the following five categories:
•
Register/Memory Instructions
•
Read-Modify-Write Instructions
•
Jump/Branch Instructions
•
Bit Manipulation Instructions
•
Control Instructions
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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