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TPS7H1111MPWPTSEP Folha de dados(PDF) 1 Page - Texas Instruments |
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TPS7H1111MPWPTSEP Folha de dados(HTML) 1 Page - Texas Instruments |
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1 / 59 page ![]() TPS7H1111-SP and TPS7H1111-SEP 1.5-A, Ultra-Low Noise, High PSRR Radiation Hardened Low Dropout (LDO) Linear Regulator 1 Features • Total ionizing dose (TID) characterized – Radiation hardness assurance (RHA) availability of 100 krad(Si) or 50 krad(Si) • Single-event effects (SEE) characterized – Single-event latchup (SEL), single-event burnout (SEB), and single-event gate rupture (SEGR) immune up to linear energy transfer (LET) = 75 MeV-cm2/mg – Single-event functional interrupt (SEFI) and single-event transient (SET) characterized up to LET = 75 MeV-cm2/mg • Ultra-Low Noise (10 Hz – 100 kHz): – 1.71 µVRMS (typ) • High power-supply rejection ratio, PSRR (typ): – 109 dB at 1 kHz – 71 dB at 100 kHz – 66 dB at 1 MHz • Input voltage range from 0.85 V to 7 V • Bias supply of 2.2 V to 14 V to minimize power dissipation • Output voltage as low as 0.4 V • Up to 1.5-A output current • Excellent output accuracy over line and load: – +1.1% / –1.3% across temperature – +0.9% / –0.7% at 25°C • Low-dropout: 215 mV (typ) at 1.5 A • Programmable soft start control (SS_SET) • Open-drain power good (PG) indicator • Configurable power good threshold (FB_PG) • Exposed control loop with the external compensation STAB pin • Internal current limit with configurable behavior • Current sharing to allow operation of up to 2.9-A • Military (–55°C to 125°C) temperature range 2 Applications • Satellite electrical power system (EPS) • Power for high-speed and high-accuracy circuits – Data Converters: ADCs and DACs (analog-to- digital and digital-to-analog converters) – VCOs (voltage controlled oscillators) – PLLs (phase-lock-loops) – SerDes (serializer and deserializers) – Imaging sensors • Accurate supply for FPGAs (field programmable gate arrays) and DSPs (digital signal processors) • Radiation-hardened ultra-clean analog supply for space constrained areas 3 Description The TPS7H1111 is an ultra-low noise, high PSRR, low dropout linear regulator (LDO) optimized for powering RF (radio frequency) devices in a space environment. It is capable of sourcing up to 1.5 A over a 0.85-V to 7-V input range with a 2.2-V to 14-V bias supply. The high performance of the device limits power- supply generated phase noise and clock jitter, making this device ideal for powering high-performance ADCs, DACs, VCOs, PLLs, SerDes, and other RF components in satellites. For digital loads (such as FPGAs and DSPs) requiring low voltage operation, the exceptional accuracy and excellent transient performance ensure optimal system performance. A standard microcircuit drawing (SMD) is available for the QML variants, 5962R21203. A vendor item drawing (VID) is available for the SEP variant, V62/23602. Device Information(1) PART NUMBER GRADE PACKAGE(2) 5962R2120301VXC(3) QMLV-RHA 14-pin Ceramic 8.03 mm x 9.12 mm Mass = 1.09 g TPS7H1111HBL/EM Engineering sample 5962R2120301PYE(3) QMLP-RHA 28-pin Plastic 4.40 mm x 9.70 mm TPS7H1111MPWPTSEP (3) SEP 5962R2120301V9A(3) KGD (QMLV-RHA) Die 2.61 mm x 5.04 mm (1) For additional information view the Section 5 table. (2) Dimension and mass values are nominal. (3) Product preview. TPS7H1111 CIN CIN IN CLM EN SS_SET OUTS PG STAB OUT 0.85 V t ó V COUT COUT 0.4 V t ñXñ V @ 1.5A RPG RPG IN OUT REF FB_PG RREF RREF RSET RSET CSS CSS RFBPG_TOP RFBPG_TOP RFBPG_BOT RFBPG_BOT BIAS GND RBIAS RBIAS CBIAS CBIAS 2.2 V t íð V CCOMP CCOMP RCOMP RCOMP REN_TOP REN_TOP REN_BOT REN_BOT VPG Typical Application Circuit TPS7H1111-SP SLVSFT8 – FEBRUARY 2023 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains ADVANCE INFORMATION for pre-production products; subject to change without notice. |
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