STM32H757AI datasheet(185/251 Pages) STMICROELECTRONICS

Nome de Peças	STM32H757AI

Descrição Electrónicos	Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI, crypto

PDF	251 Pages

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Fabricante Electrônico	STMICROELECTRONICS [STMicroelectronics]

Página de início	http://www.st.com

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185 / 251 page

DS12931 Rev 1

185/251

STM32H757xI

Electrical characteristics

230

The following table summarizes the parameters measured in DDR mode.

tw(CKH)

QUADSPI clock high

and low time Even

division

PRESCALER[7:0] =

n = 0,1,3,5...

TCK/2–0.5

TCK/2

tw(CKL)

TCK/2

TCK/2+0.5

tw(CKH)

QUADSPI clock high

and low time Odd

division

PRESCALER[7:0] =

n = 2,4,6,8...

(n/2)*TCK/(n+1)-0.5

(n/2)*TCK/ (n+1)

tw(CKL)

(n/2+1)*TCK/(n+1)

(n/2+1)*TCK/

(n+1)+0.5

ts(IN)

Data input setup time

th(IN)

Data input hold time

3.5

tv(OUT)

Data output valid time

th(OUT)

Data output hold time

1. Guaranteed by characterization results.

Table 96. QUADSPI characteristics in SDR mode(1) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 97. QUADSPI characteristics in DDR mode(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fck11/TCK

QUADSPI clock frequency

2.7<VDD<3.6 V

CL = 20 pF

100

MHz

1.62<VDD<3.6 V

CL = 15 pF

100

tw(CKH)

QUADSPI clock high and

low time Even division

PRESCALER[7:0] =

n = 0,1,3,5...

TCK/2–0.5

TCK/2

tw(CKL)

TCK/2

TCK/2+0.5

tw(CKH)

QUADSPI clock high and

low time Odd division

PRESCALER[7:0] =

n = 2,4,6,8...

(n/2)*TCK/

(n+1)-0.5

(n/2)*TCK/

(n+1)

tw(CKL)

(n/2+1)*TCK/

(n+1)

(n/2+1)*TCK /

(n+1)+0.5

tsr(IN), tsf(IN)

Data input setup time

1.5

thr(IN),thf(IN)

Data input hold time

3.5

tvr(OUT),

tvf(OUT)

Data output valid time

DHHC=0

DHHC=1

PRESCALER[7:0] =

1,2…

-TCK/4+1

TCK/4+2

thr(OUT),

thf(OUT)

Data output hold time

DHHC=0

DHHC=1

PRESCALER[7:0]=1

,2…

TCK/4

1. Guaranteed by characterization results.

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