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MPC8540 Folha de dados(PDF) 232 Page - Freescale Semiconductor, Inc

Nome de Peças MPC8540
Descrição Electrónicos  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Fabricante Electrônico  FREESCALE [Freescale Semiconductor, Inc]
Página de início  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Folha de dados(HTML) 232 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
5-18
Freescale Semiconductor
Core Complex Overview
upper and lower 32 bits of two 64-bit GPR values and produce two 32-bit results written to a 64-bit
GPR.
As shown in Figure 5-4, the LSU, MU, and SU1 replicate logic to support 64-bit operations.
Although a vector instruction generates separate, discrete results in the upper and lower halves of
the target GPR, latency and throughput for vector instructions are the same as those for their scalar
equivalents.
5.6
Programming Model
The following section describes the e500 core registers defined in Book E, the Freescale
Semiconductor Book E implementation standards (EIS), and registers that are specific to the e500.
Table 5-6 shows the e500 register set.



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