AM652X datasheet(267/284 Pages) TI

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9.2.8.1 LVCMOS External Capacitor Connections

Each VDDSHV[8:0], and VDDSHV[2:0]_WKUP can be configured as 1.8 V or 3.3 V. Figure 9-7 through Figure

9-10 illustrate different system configurations for the dual-voltage I/O supplies.

VDDSHV[8:0], and VDDSHV[2:0]_WKUP are the dual-voltage LVCMOS I/O supplies, while VDDS[8:0] are the

dual-voltage LVCMOS I/O bias supplies. If any of the VDDSHV[8:0] or VDDSHV[2:0]_WKUP are configured

for 3.3 V operation, the corresponding VDDS[8:0] or VDDS[2:0]_WKUP should be sourced from the internal

I/O Bias LDO. When any of the VDDSHV[8:0] or VDDSHV[2:0]_WKUP are configured for 1.8 V operation,

both VDDS[8:0] and VDDSHV[8:0] or VDDS[2:0]_WKUP and VDDSHV[2:0]_WKUP should be supplied from the

same source.

Two I/O Bias LDOs are integrated on this device to share load current. The recommended load sharing is as

follows:

• IOLDO0 : VDDS0, VDDS1, VDDS2, VDDS5, VDDS7, VDDS8

• IOLDO1 : VDDS3, VDDS4, VDDS6

Figure 9-7 shows all VDDSHV[8:0], and VDDSHV[2:0]_WKUP supplies configured for 3.3V operation.

Device

VDDSHV0_WKUP

VDDSHV1_WKUP

VDDSHV2_WKUP

VDDA_3P3_IOLDO0

VDDA_3P3_IOLDO1

VDDSHV7

I/O Bias LDO

VDDA_POR_WKUP

VDDA_3P3_IOLDO_WKUP

VDDSHV0

VDDSHV1

VDDSHV2

VDDSHV3

VDDSHV4

VDDSHV5

VDDSHV6

I/O Bias LDO

VDDS1

VDDS2

VDDS4

VDDS0

VDDS5

VDDS7

VDDS8

VDDS3

Wakeup

Domain

Main

Domain

SPRSP08 DECOUPLING CAPS_01

VDDS2_WKUP

VDDS0_WKUP

VDDS1_WKUP

VDDS6

VDDSHV8

CAP_VDDA_1P8_IOLDO_WKUP

CAP_VDDA_1P8_IOLDO1

CAP_VDDA_1P8_IOLDO0

Figure 9-7. All VDDSHV[8:0], and VDDSHV[2:0]_WKUP Supplies Configured for 3.3 V Operation

Figure 9-8 shows all VDDSHV[8:0] and VDDSHV[2:0]_WKUP supplies configured for 1.8 V operation.

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AM6548, AM6528, AM6546, AM6526

SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021

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Product Folder Links: AM6548 AM6528 AM6546 AM6526

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