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AM2434...ALV Folha de dados(PDF) 111 Page - Texas Instruments

Nome de Peças AM2434...ALV
Descrição Electrónicos  AM243x Sitara™ Microcontrollers
PDF  280 Pages
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AM2434...ALV Folha de dados(HTML) 111 Page - Texas Instruments

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Table 6-86. Connectivity Requirements (ALV Package) (continued)
BALL NUMBER
BALL NAME
CONNECTION REQUIREMENTS
H2
H1
J5
K5
F6
H4
D2
C5
E2
D4
D3
F2
J2
L5
J3
J4
K3
J1
M5
K4
G4
G5
G2
H3
H5
F1
E1
F4
F3
E3
E4
B2
M2
A3
A2
B5
A4
B3
C4
C2
B4
N5
L4
L2
M3
N4
N3
M4
N2
C1
B1
N1
M1
E5
F5
D5
DDR0_ACT_n
DDR0_ALERT_n
DDR0_CAS_n
DDR0_PAR
DDR0_RAS_n
DDR0_WE_n
DDR0_A0
DDR0_A1
DDR0_A2
DDR0_A3
DDR0_A4
DDR0_A5
DDR0_A6
DDR0_A7
DDR0_A8
DDR0_A9
DDR0_A10
DDR0_A11
DDR0_A12
DDR0_A13
DDR0_BA0
DDR0_BA1
DDR0_BG0
DDR0_BG1
DDR0_CAL0
DDR0_CK0
DDR0_CK0_n
DDR0_CKE0
DDR0_CKE1
DDR0_CS0_n
DDR0_CS1_n
DDR0_DM0
DDR0_DM1
DDR0_DQ0
DDR0_DQ1
DDR0_DQ2
DDR0_DQ3
DDR0_DQ4
DDR0_DQ5
DDR0_DQ6
DDR0_DQ7
DDR0_DQ8
DDR0_DQ9
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQS0
DDR0_DQS0_n
DDR0_DQS1
DDR0_DQS1_n
DDR0_ODT0
DDR0_ODT1
DDR0_RESET0_n
If DDRSS0 is not used, leave unconnected.
Note: The DDR0 pins in this list can only be left unconnected
when VDDS_DDR and VDDS_DDR_C are connected to VSS. The
DDR0 pins must be connected as defined in the AM64x\AM243x
DDR Board Design and Layout Guidelines, when VDDS_DDR and
VDDS_DDR_C are connected to a power source.
K13
H14
VDD_MMC0
VDD_DLL_MMC0
If MMC0 is not used, each of these balls must be connected to the
same power source as VDD_CORE.
K14
VDDS_MMC0
If MMC0 is not used, each of these balls must be connected to
any 1.8-V power source that does not violate device power supply
sequencing requirements.
www.ti.com
AM2434, AM2432, AM2431
SPRSP65D – APRIL 2021 – REVISED AUGUST 2022
Copyright © 2022 Texas Instruments Incorporated
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