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STM32L071VB Folha de dados(PDF) 106 Page - STMicroelectronics

Nome de Peças STM32L071VB
Descrição Electrónicos  Access line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, up to 192KB Flash, 20KB SRAM, 6KB EEPROM, ADC
PDF  148 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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STM32L071VB Folha de dados(HTML) 106 Page - STMicroelectronics

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Electrical characteristics
STM32L071xx
106/148
DS10690 Rev 7
tsu(NSS)
NSS setup time
Slave mode, SPI
presc = 2
4*Tpclk
-
-
ns
th(NSS)
NSS hold time
Slave mode, SPI
presc = 2
2*Tpclk
-
-
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
Tpclk-2
Tpclk
Tpclk+
2
tsu(MI)
Data input setup time
Master mode
0
-
-
tsu(SI)
Slave mode
3
-
-
th(MI)
Data input hold time
Master mode
7
-
-
th(SI)
Slave mode
3.5
-
-
ta(SO
Data output access time
Slave mode
15
-
36
tdis(SO)
Data output disable time
Slave mode
10
-
30
tv(SO)
Data output valid time
Slave mode
1.65 V<VDD<3.6 V
-18
41
Slave mode
2.7 V<VDD<3.6 V
-18
25
tv(MO)
Master mode
-
4
7
th(SO)
Data output hold time
Slave mode
10
-
-
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. The maximum SPI clock frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI)
which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be
achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%.
Table 71. SPI characteristics in voltage Range 1 (1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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