STM32F722VCK7TR datasheet(165/229 Pages) STMICROELECTRONICS

165 / 229 page

DS11853 Rev 6

165/229

STM32F722xx STM32F723xx

Electrical characteristics

201

The SDA and SCL I/O requirements are met with the following restrictions: the SDA and

SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS

connected between the I/O pin and VDD is disabled, but is still present.

The 20mA output drive requirement in Fast-mode Plus is not supported. This limits the

maximum load Cload supported in Fm+, which is given by these formulas:

•

Tr(SDA/SCL)=0.8473xRpxCload

•

Rp(min)= (VDD-VOL(max))/IOL(max)

Where Rp is the I2C lines pull-up. Refer to

Section 6.3.20: I/O port characteristics for the

I2C I/Os characteristics.

All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog

filter characteristics:

Table 79. Minimum I2CCLK frequency in all I2C modes

Symbol

Parameter

Condition

Min

Unit

f(I2CCLK)

I2CCLK

frequency

Standard-mode

MHz

Fast-mode

Analog Filter ON

DNF=0

Analog Filter OFF

DNF=1

Fast-mode Plus

Analog Filter ON

DNF=0

22.5

Analog Filter OFF

DNF=1

Table 80. I2C analog filter characteristics(1)

1. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tAF

Maximum pulse width of spikes

that are suppressed by the analog

filter

50(2)

2. Spikes with widths below tAF(min) are filtered.

260(3)

3. Spikes with widths above tAF(max) are not filtered

STM32F722VCK7TR Folha de dados(PDF) 165 Page - STMicroelectronics

STM32F722VCK7TR Folha de dados(HTML) 165 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL