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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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AM652X Folha de dados(PDF) 125 Page - Texas Instruments |
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AM652X Folha de dados(HTML) 125 Page - Texas Instruments |
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125 / 299 page  125 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Table 5-7. Analog ADC Buffers DC Electrical Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER CONDITIONS MIN NOM MAX UNIT BALL NAMES in Mode 0: MCU_ADC0_AIN[7:0] / MCU_ADC0_REFP/N / MCU_ADC1_AIN[7:0] / MCU_ADC1_REFP/N BALL NUMBERS: F4 / F5 / G3 / G4 / G5 / G6 / H2 / H3 / H4 / H5 / J1 / J2 / J3 / J4 / J5 / J6 / K2 / K3 / K4 / K5 Analog Input VIN Full-scale Input Range Single Ended mode 0.5 1.8 V Differential Mode 1 3.6 V VREF Voltage reference Should be less than or equal to VDDA_MCU_ADC0/1. 1.8 V DNL Differential Non-Linearity -1 0.5 1 LSB INL Integral Non-Linearity MCU_ADC0/1_REFP = VDDA_MCU_ADC0/1 ±1 ±2 LSB LSBGAIN-ERROR Gain Error MCU_ADC0/1_REFP = VDDA_MCU_ADC0/1 ±2 LSB LSBOFFSET-ERROR Offset Error MCU_ADC0/1_REFP = VDDA_MCU_ADC0/1 ±2 LSB CIN Input Sampling Capacitance 5.5 pF FC Input Frequency MCU_ADC0/1_AIN[7:0] TBD TBD kHz SNR Signal-to-Noise Ratio Input Signal: 200 kHz sine wave at -0.5 dB Full Scale 70 dB THD Total Harmonic Distortion 1.7 Vpp, 200 kHz sine wave 75 dB SFDR Spurious Free Dynamic Range 1.7 Vpp, 200 kHz sine wave 80 dB SNR(PULSE) Signal-to-Noise Plus Distortion 1.7 Vpp, 200 kHz sine wave 69 dB RVREF VREF Input Impedance 2.2 kΩ Sampling Dynamics tSS Time from Start to Start TBD Clock Cycles tC Conversion Time 14 15 Clock Cycles tACQ Acquisition time TBD Clock Cycles TR Throughput Rate CLK = 60 MHz 4 MSPS CCISO Channel to Channel Isolation 100 dB F ADC ADC Clock Frequency 60 60 MHz Table 5-8. OLDI LVDS Buffers DC Electrical Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER Test Conditions MIN TYP MAX UNIT 1.8-V MODE BALL NAMES in Mode 0: OLDI0_A0P/N / OLDI0_A1P/N / OLDI0_A2P/N / OLDI0_A3P/N / OLDI0_CLKP/N BALL NUMBERS: J24 / J26 / J28 / K24 / K25 / K26 / K27 / K28 / L25 / L27 OLDI LVDS TRANSMITTER VOH High Level Output Voltage RL=100Ω 1.3 1.6 V VOL Low Level Output Voltage 0.9 1.01 V VCM Common Mode Voltage (OLDI) 1.125 1.25 1.375 V Common Mode Voltage (sub-LVDS) 0.9 V VOD Differential Output Voltage 250 380 450 mV Reduced Differential Output Voltage 100 200 300 mV IOS Output Short Circuit Current PAD/PADN=0, RL=100Ω -5 mA IOZ Output Tri-State Current PAD/PADN = 0/VDDS -10 4 40 µA TRF Rise/Fall Delay Time from 20% to 80% 100 ns |
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