| Os motores de busca de Datasheet de Componentes eletrônicos |
|
The question interval is too short.
Please try again in a few seconds.
Hello, Please ask a question about AS1544 Datasheet
# Example questions:
➢ What is the typical maximum power dissipation in normal mode (operational) with fsclk = 20mhz and vdd = 4.75 to 5.25v?
➢ What is the minimum sclk period (tcp)?
➢ What is the typical input supply range (vdd) for the as1543/44, as specified in the data sheet?
1. Power Requirements
️· Input Supply Range (VDD): 2.75 - 5.25V
️· DRIVE Range (VDRIVE): 2.75 - 5.25V (must be less than or equal to VDD)
️· Normal Mode (Static) Input Current (IDD): 0.01 - 0.5 µA
️· Normal Mode (Operational) Input Current (fSCLK = 20MHz, VDD = 4.75-5.25V): 3.0 - 3.5 mA
️· Normal Mode (Operational) Input Current (fSCLK = 20MHz, VDD = 2.7-3.6V): 2.4 - 2.8 mA
️· Auto Shutdown Mode Input Current: 1.4 - 1.6 mA (at VDD = 4.75-5.25V)
️· Power Dissipation (Normal Mode, Operational, fSCLK = 20MHz, VDD = 4.75-5.25V): 18.4 mW
️· Power Dissipation (Auto Shutdown Mode, Static, VDD = 4.75-5.25V): 2.5 µW
2. Timing Specifications
️· SCLK Frequency (fSCLK): 0.01 - 20 MHz
️· SCLK Period (tCP): 50 ns (at 20 MHz)
️· Minimum Quiet Time (tQUIET): 50 ns
️· CSN Fall to SCLK Fall Setup (tCSS): 10 ns
️· CSN Fall to DOUT Enabled (tCSDOE): 20 ns
️· CSN Fall to DOUT Valid (tCSDOV): 40 ns
️· SCLK Pulse Width Low (tCL): 0.4 * tCP
️· SCLK Pulse Width High (tCH): 0.4 * tCP
️· SCLK Fall to DOUT Hold (tDOH): 10 ns
️· SCLK Fall to DOUT Valid (tDOV): 50 ns
️· SCLK Fall to DOUT Disable (tDOD): 15-50 ns
️· DIN to SCLK Fall Setup (tDS): 20 ns
️· DIN to SCLK Fall Hold (tDH): 5 ns
️· Sixteenth SCLK Fall to CSN Rise Hold (tCSH): 20 ns
️· Power-up time (tWAKEUP): 1 µs
3. Characteristics (from Figures)
️· Figure 5 (Integral Nonlinearity): Shows a small range of nonlinearity around 0V.
️· Figure 6 (Differential Nonlinearity): Shows a small range of nonlinearity around 0V.
️· Figure 7 (FFT @ 50kHz, RANGE=1, SE/FDN=1):
- SNR = 71.0 dB
- THD = -85.5 dB
- SFDR = 86.5 dB
️· Figure 8 (FFT @ 50kHz, RANGE=1, SE/FDN=0):
- SNR = 72.1 dB
- THD = -84.7 dB
- SFDR = 86.2 dB
️· Figure 9 (ENOB vs. VREFIN): ENOB is approximately 11.6 for a range of VREFIN voltages. Values vary slightly depending on VDD.
️· Figure 10 (ENOB vs. Input Signal Frequency): ENOB is relatively consistent across the tested frequency range (10-1000 kHz).
1. Power Requirements
️· Input Supply Range (VDD): 2.75 - 5.25V
️· DRIVE Range (VDRIVE): 2.75 - 5.25V (must be less than or equal to VDD)
️· Normal Mode (Static) Input Current (IDD): 0.01 - 0.5 µA
️· Normal Mode (Operational) Input Current (fSCLK = 20MHz, VDD = 4.75-5.25V): 3.0 - 3.5 mA
️· Normal Mode (Operational) Input Current (fSCLK = 20MHz, VDD = 2.7-3.6V): 2.4 - 2.8 mA
️· Auto Shutdown Mode Input Current: 1.4 - 1.6 mA (at VDD = 4.75-5.25V)
️· Power Dissipation (Normal Mode, Operational, fSCLK = 20MHz, VDD = 4.75-5.25V): 18.4 mW
️· Power Dissipation (Auto Shutdown Mode, Static, VDD = 4.75-5.25V): 2.5 µW
2. Timing Specifications
️· SCLK Frequency (fSCLK): 0.01 - 20 MHz
️· SCLK Period (tCP): 50 ns (at 20 MHz)
️· Minimum Quiet Time (tQUIET): 50 ns
️· CSN Fall to SCLK Fall Setup (tCSS): 10 ns
️· CSN Fall to DOUT Enabled (tCSDOE): 20 ns
️· CSN Fall to DOUT Valid (tCSDOV): 40 ns
️· SCLK Pulse Width Low (tCL): 0.4 * tCP
️· SCLK Pulse Width High (tCH): 0.4 * tCP
️· SCLK Fall to DOUT Hold (tDOH): 10 ns
️· SCLK Fall to DOUT Valid (tDOV): 50 ns
️· SCLK Fall to DOUT Disable (tDOD): 15-50 ns
️· DIN to SCLK Fall Setup (tDS): 20 ns
️· DIN to SCLK Fall Hold (tDH): 5 ns
️· Sixteenth SCLK Fall to CSN Rise Hold (tCSH): 20 ns
️· Power-up time (tWAKEUP): 1 µs
3. Characteristics (from Figures)
️· Figure 5 (Integral Nonlinearity): Shows a small range of nonlinearity around 0V.
️· Figure 6 (Differential Nonlinearity): Shows a small range of nonlinearity around 0V.
️· Figure 7 (FFT @ 50kHz, RANGE=1, SE/FDN=1):
- SNR = 71.0 dB
- THD = -85.5 dB
- SFDR = 86.5 dB
️· Figure 8 (FFT @ 50kHz, RANGE=1, SE/FDN=0):
- SNR = 72.1 dB
- THD = -84.7 dB
- SFDR = 86.2 dB
️· Figure 9 (ENOB vs. VREFIN): ENOB is approximately 11.6 for a range of VREFIN voltages. Values vary slightly depending on VDD.
️· Figure 10 (ENOB vs. Input Signal Frequency): ENOB is relatively consistent across the tested frequency range (10-1000 kHz).
| Part No. | AS1544 |
| Manufacturer | AMSCO |
| Size | 1Mb |
| Pages | 29 pages |
| Description | 8/4-Channel, 1 Msps, 12-Bit ADC with Sequencer |
| ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | Link para a ficha técnica | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |